Description
HDG205 enables a cost efficient ultra low power, high performance and feature rich client solution. It provides up to 65 Mbit/s data rate when operating in the OFDM mode and up to 11 Mbit/s data rate when operating in the DSSS/CCK mode.
HDG205 integrates RF, baseband/MAC, memory, RF filters and oscillator into a highly integrated and optimized SIP (System In Package) solution with high quality and reliability. This minimizes the need of external components, simplifying assembly and test.
This highly integrated solution is optimized for customer applications running on a host CPU.
The host interface supports SDIO and SPI. Internal RAM comprises both code and data memory eliminating the need for external RAM, Flash or ROM memory interfaces.
MAC address, firmware and calibration data are stored in the on board memory.
Key features
- Support for 802.11b/g/n
- Data Rates: 1, 2, 5.5, 6, 7.2, 9, 11, 12, 14.4, 18, 21.7, 24, 28.9, 36, 43.3, 48, 54, 57.8, 65 Mbps
- Modulation: QPSK, 16QAM, 64QAM DBPSK, DQPSK, CCK, OFDM with BPSK
- Open WEP, WPA/WPA2 encryption
- No external RF components
- Low power consumption due to efficient PA design
- LDO:s for RF-VCO and crystal oscillator for lower pushing
- An internal 32 kHz oscillator maintains real time in power save mode, allows the high frequency clock to be turned off.
- Support for an external 32kHz real time clock
- Extensive DMA hardware support for data flow to reduce CPU load.
- Advanced power management for optimum power consumption at varying load.
- External interfaces SDIO/SPI
- On-board High Frequency High Precision Oscillator 40 MHz
- Wide Range Supply Voltage, 2.85-4.35 V
- Small footprint 8 x 8 mm (64 mm2) 44-pin QFN
- RoHS Compliant
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